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MACHINE LANGUAGE COURSE PART V €by Mark van den Boer

Logical Operations

Instruction:   AND
Syntax:        AND <ea>,Dn
               AND Dn,<ea>
Data sizes:    byte, word, long
Condition codes affected:
               X    not affected
               N    set to the most significant bit of the result
               Z    set if the result is zero, cleared otherwise
               V,C  always cleared









Addressing modes:
Source: (destination is Dn)
          Dn
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
          w(PC)
          b(PC,Rn)
Destination: (source is Dn)
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
Function: Perform   a   boolean  bitwise  AND   from   source   to 
          destination.
Examples:
Instruction              Before         After
AND.B d0,d1              d0=33333333    d0=33333333
                         d1=ffffffff    d1=ffffffcc
AND.W d0,d1              d0=33333333    d0=33333333
                         d1=ffffffff    d1=ffffcccc
AND.L d0,d1              d0=33333333    d0=33333333
                         d1=ffffffff    d1=cccccccc


Instruction:   ANDI
Syntax:        ANDI #,<ea>
Data sizes:    byte, word, long
Condition codes affected:
               X    not affected
               N    set to the most significant bit of the result
               Z    set if the result is zero, cleared otherwise
               V,C  always cleared




Addressing modes:
Destination:
          Dn
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
          CCR, SR
Function: Perform   a   boolean  bitwise  AND   from   source   to 
          destination.
Examples:
Instruction              Before         After
ANDI.B #7,d0             d0=33333333    d0=33333330
ANDI.W #$ff00,SR         SR=ffff        SR=ff00





Instruction:   EOR
Syntax:        EOR Dn,<ea>
Data sizes:    byte, word, long
Condition codes affected:
               X    not affected
               N    set to the most significant bit of the result
               Z    set if the result is zero, cleared otherwise
               V,C  always cleared
Addressing modes:
Destination:
          Dn
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l




Function: Perform  a bitwise exclusive or from source to  destina-
          tion.  You  will notice that this instruction  can  only 
          take a data register as the source,  unlike the AND  and 
          OR  instructions.  I  think the designers of  the  68000 
          should have mode addressing modes more orthogonal.
Examples:
Instruction              Before         After
EOR.L d0,d1              d0=ffffffff    d0=ffffffff
                         d1=f0f0f0f0    d1=0f0f0f0f


Instruction:   EORI
Syntax:        EORI #,<ea>
Data sizes:    byte, word, long
Condition codes affected:
               X    not affected
               N    set to the most significant bit of the result
               Z    set if the result is zero, cleared otherwise
               V,C  always cleared



Addressing modes:
Destination:
          Dn
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
          CCR, SR
Function: Perform   a   bitwise  exclusive  or  from   source   to 
          destination.
Examples:
Instruction              Before         After
EORI.B #$ff,d0           d0=33333330    d0=333333cf
EORI.W #$00ff,SR         SR=ff32        SR=ffcd





Instruction:   NOT
Syntax:        NOT <ea>
Data sizes:    byte, word, long
Condition codes affected:
               X    not affected
               N    set to the most significant bit of the result
               Z    set if the result is zero, cleared otherwise
               V,C  always cleared
Addressing modes:
Destination:
          Dn
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
Function: Perform a bitwise not to the effective address  operand. 
          Note that NOT.W d0 is the same as EORI.W #$ffff,d0.


Examples:
Instruction              Before         After
NOT.B #$ff,d0            d0=ffffff78    d0=ffffff87


Instruction:   OR
Syntax:        OR <ea>,Dn
               OR Dn,<ea>
Data sizes:    byte, word, long
Condition codes affected:
               X    not affected
               N    set to the most significant bit of the result
               Z    set if the result is zero, cleared otherwise
               V,C  always cleared








Addressing modes:
Source: (destination is Dn)
          Dn
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
          w(PC)
          b(PC,Rn)
Destination: (source is Dn)
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
Function: Perform a boolean bitwise OR from source to destination.

Examples:
Instruction              Before         After
OR.B d0,d1               d0=ffffffff    d0=ffffffff
                         d1=33333333    d1=333333ff
OR.W d0,d1               d0=ffffffff    d0=ffffffff
                         d1=33333333    d1=3333ffff
OR.L d0,d1               d0=ffffffff    d0=ffffffff
                         d1=33333333    d1=ffffffff


Instruction:   ORI
Syntax:        ORI #,<ea>
Data sizes:    byte, word, long
Condition codes affected:
               X    not affected
               N    set to the most significant bit of the result
               Z    set if the result is zero, cleared otherwise
               V,C  always cleared




Addressing modes:
Destination:
          Dn
          (An)
          (An)+
          -(An)
          w(An)
          b(An,Rn)
          w
          l
          CCR, SR
Function: Perform  a boolean bitwise OR from source  to  destina-
          tion.
Examples:
Instruction              Before         After
ORI.B #7,d0               d0=33333330    d0=33333333
ORI.W #$00ff,SR           SR=ff00        SR=ffff

Originally published in ST NEWS Volume 2 Issue 4.